Successful Proof of Concept of a new type of two-photons chip-scale atomic clock: Final Presentation of NAVISP Project EL1-032 BIS now available

Last Updated: 07/02/2022 14:03     Created at: 07/02/2022 14:02

On Friday, February 04, 2021, the Swiss Center for Electronics and Microtechnology (CSEM) presented the results of the NAVISP project “ADVANCED CONCEPT FOR CHIP-SCALE ATOMIC CLOCKS” (A-CSAC).  About 50 people from industry and research followed the interesting presentation and the subsequent interactive Q&A session.

In recent years, it has been shown that the currently used chip-scale atomic clock (CSAC) technology, which is based on miniaturization of atomic resonators using micro-fabricated vapour cells and coherent laser-atom interaction, can exhibit certain deficiencies such as limited frequency stability and temperature sensitivity.

As part of NAVISP Element 1, which aims to develop innovative concepts, techniques, technologies, and systems related to the PNT sector along the entire value chain, the activity’s main objective was to analyse, define and demonstrate a proof-of-concept of a new type of chip-scale atomic clock, taking advantage of recent and expected advances in micromachining, photonics, packaging, power consumption, and hybrid integration technologies.

As part of the project, CSEM, together with its subcontractor Ligentec and consortium partners University of Neuchatel and Orolia Switzerland SA, investigated different alternative technologies such as trapped atoms clocks, molecular and Nitrogen-Vacancy (NV) centre clocks as well as hot vapour optical clocks. Then, they selected, for the proof of concept, the hot vapour optical clocks which offered improved stability, while relying on a relatively simple system. Based on these insights, the team succeeded in defining and testing a chip-scale atomic clock architecture based on hot vapour optical transitions.

These important research results provide the basis for the design of a new type of chip-scale atomic clocks. The project clearly identified future challenges and requirements, increasing the prospects for developing a successful, commercially viable technology with higher frequency stability, while opening up new opportunities in terms of miniaturization, performance and power reduction.

More detailed information can be found in the slides of the Final Presentation.